Explain like I'm five · Systems

What is HBM (High Bandwidth Memory)?

HBM, told as a story about stacking a toolbox tower right next to the engine and connecting it through a very wide passage.

the big engine job needs lots of tools at onceone thin hose means tools trickle in slowly

The big engine job needs lots of tools at once.One thin hose means tools trickle in slowly.

three hoses still lag — the distance is too farwhat if the toolbox sat right next to the engine?adding hoses only goes so far if the toolbox stays far away

With the toolbox far away, adding hoses only goes so far.So the toolbox moves right beside the engine.

HBM stacks toolboxes right beside the engine with a very wide passagea huge number of tools cross to the engine at once — high bandwidth

HBM stacks toolboxes right beside the engine with a very wide passage.A huge number of tools cross to the engine at once — high bandwidth.

Stack in layersstacks several toolboxes up
Keep it right next doorkeeps it near the engine to cut distance
Make the passage very widetools move through over a thousand lanes at once
Pricier, but widermore bandwidth, at the price of more heat and cost
ordinary hose (DDR)toolbox sits far awayjust a few thin hosescheaper than HBMHBM — stacked + ultra-widestack sits right next to the enginea huge number of lanes at oncemore bandwidth than DDR, but pricier

Ordinary DDR has a far toolbox and thin hoses; HBM has a close tower and a wide passage.HBM has more bandwidth than DDR, but is pricier.

far more tools cross at once than through a hose (DDR)stacking higher means more heat and more costso HBM mostly goes where bandwidth beats capacity — AI, graphics

The higher the tower, the more heat and cost.So HBM is mainly used where bandwidth matters most — AI, graphics.

In one breath

HBM stacks memory chips in layers right beside the processor and links them through a very wide passage, moving huge amounts of data at once.

HBM (High Bandwidth Memory) vertically stacks DRAM chips using TSVs (through-silicon vias) and places them right next to a GPU or AI accelerator via an interposer, connecting them with a very wide bus. Rather than pushing per-pin speed, it widens the bus (64 bits for a DDR module, 1,024 per HBM stack, 2,048 for HBM4) to offer far higher bandwidth than conventional DDR memory, but is costlier to manufacture and requires careful heat management. It's mainly used where memory bandwidth drives performance, such as graphics and AI workloads.

When grown-ups say it

HBM
The toolbox tower stacked right by the engine. The tower and engine connect through a very wide passage.
Bandwidth
How many tools can cross in a given time. A wider passage means more bandwidth.
TSV (Through-Silicon Via)
The pillar drilled straight through the stacked layers. Connects the stacked chips directly.
Interposer
The base plate linking the tower to the engine. Lets the tower and engine sit close together.
DDR Memory
The ordinary toolbox sitting far away. Cheaper than HBM, but lower bandwidth.
GPU/AI Accelerator
The big engine that needs lots of tools. Where HBM is most often placed alongside.
Thermal Management
The heat that grows as the tower stacks higher. A major challenge in HBM design.
Memory Bandwidth Bottleneck
The engine sitting idle because tools arrive too slowly. The problem HBM aims to solve.
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